CY7C136-25JXC

IC SRAM 16KBIT PARALLEL 52PLCC
part number has RoHS
1 : $0.0000

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Dasenic Part Number
FD3B96-DS
Manufacturer Part #
CY7C136-25JXC

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49 In Stock

MOQ
1PCS
Delivery Time
Ship Within 48 Hours
Packaging
52-LCC (J-Lead)

Quantity

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ManufacturerInfineon Technologies
Integrated Circuits (ICs)Memory
Product StatusObsolete
Operating Temperature0°C ~ 70°C (TA)
Package / Case52-LCC (J-Lead)
TechnologySRAM - Dual Port, Asynchronous
Supplier Device Package52-PLCC (19.13x19.13)
Memory Size16Kb (2K x 8)
Memory TypeVolatile
Voltage - Supply4.5V ~ 5.5V
Access Time25 ns
Memory FormatSRAM
Memory InterfaceParallel
Write Cycle Time - Word, Page25ns

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Environmental & Export Classifications
EU RoHS StatusRoHS Compliant
REACH StatusVendor is not defined
US ECCNProvided as per user requirements
China RoHS StatusOrange Symbol: Safe for use during the environmental protection period
Description (v) Features
The CY7C136-25JXC is an Integrated Circuit (IC) component produced by Cypress Semiconductor. This IC falls under the category of synchronous SRAMs (Static Random Access Memories) and is built with a 1 Meg x 36-bit configuration. Below is an overview of its key features: 1. High-Speed Operation: The CY7C136-25JXC operates at a fast speed, with a maximum access time of 25 nanoseconds. This makes it suitable for time-critical applications that require speedy data retrieval. 2. 36-bit Wide Data Bus: With a 36-bit wide data bus, this IC can handle larger chunks of data in a single operation. This feature is useful in data-intensive applications where a high volume of data needs to be processed simultaneously. 3. Low Byte Control: The device includes a low-byte control pin (LB_n) that allows the user to control the data bus output. By using this pin, users can choose to enable or disable the lower byte of data, providing flexibility in data handling. 4. Synchronous Interface: CY7C136-25JXC employs a synchronous interface, which means that data transfers are synchronized using an external clock signal. This synchronous design enables precise control over data transfers and ensures reliable and accurate operations. 5. Multiple Chip Enable Inputs: The IC offers two chip enable inputs (CE1_n and CE2_n) that control the operation of the memory

In Stock: 49

MOQ
1PCS
Packaging
52-LCC (J-Lead)
Delivery Time
Ship Within 48 Hours
Shipping Origin
Shenzhen or Hong Kong Warehouse

Quantity

Get pricing info from knowledgeable sales

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