These synchronous presettable counters feature an internal carry look-ahead
for cascading in high-speed counting applications. The 'LS668 are decade counters
and the 'LS669 are 4-bit binary counters. Synchronous operation is provided
by having all flip-flops clocked simultaneously so that the outputs change
coincident with each other when so instructed by the count-enable inputs and
internal gating. This mode of operation helps eliminate the output counting
spikes that are normally associated with asynchronous (ripple-clock) counters.
A buffered clock input triggers the four master-slave flip-flops on the rising
(positive-going) edge of the clock waveform.
These counters are fully programmable; that is, the outputs may each be
preset to either level. The load input circuitry allows loading with the carry-enable
output of cascaded counters. As loading is synchronous, setting up a low level
at the load input disables the counter and causes the outputs to agree with
the data inputs after the next clock pulse.
The carry look-ahead circuitry provides for cascading counters for n-bit
synchronous applications without additional gating. Instrumental in accomplishing
this function are two count-enable inputs and a carry output. Both count enable
inputs (P\ and T\) must be low to count. The direction
of the count is determined by the level of the up/down input. When the input
is high, the counter counts up; when low, it counts down. Input T\
is fed forward to enable the carry output. The carry output thus enabled will
produce a low-level output pulse when the count is maximum counting up or
zero counting down. This low-level overflow carry pulse can be used to enable
successive cascaded stages. Transitions at the enable P\ or T\ inputs are allowed regardless of the level of the clock input. All
inputs are diode-clamped to minimize transmission-line effects, thereby simplifying
system design.
These counters feature a fully independent clock circuit. Changes at control
inputs (enable P\, enable T\, load, up/down) that will
modify the operating mode have no effect until clocking occurs. The function
of the counter (whether enabled, disabled, loading, or counting) will be dictated
solely by the conditions meeting the stable setup and hold times.
The 'LS668 and 'LS669 are completely new designs. Compared to the original
'LS168 and 'LS169, they feature 0-nanosecond minimum hold time, reduced input
currents IIH and IIL, and all buffered outputs.
