These 8-bit flip-flops feature 3-state outputs designed
specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus drivers, and working
registers.
The eight flip-flops of the SN54ABT374 and SN74ABT374A are
edge-triggered D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to the logic levels set up
at the data (D) inputs.
A buffered output-enable () input can be used to place the eight outputs in either
a normal logic state (high or low logic levels) or a high-impedance
state. In the high-impedance state, the outputs neither load nor
drive the bus lines significantly. The high-impedance state and
increased drive provide the capability to drive bus lines without
need for interface or pullup components. does not affect internal
operations of the flip-flop. Old data can be retained or new data can
be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down,
should be tied
to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the
driver.
The SN54ABT374 is characterized for operation over the full
military temperature range of -55°C to 125°C. The
SN74ABT374A is characterized for operation from -40°C to
85°C.
