Using CMOS process technology and innovative circuit techniques, the ADS5292 is a low
power 80MSPS 8-Channel ADC. Low power consumption, high SNR, low SFDR, and consistent overload
recovery allow users to design high performance systems.
The ADS5292 has a digital processing block that integrates several commonly used digital
functions for improving system performance. It includes a digital filter module that has built-in
decimation filters (with low-pass, high-pass and band-pass characteristics). The decimation rate is
also programmable (by 2, by 4, or by 8). This makes it useful for narrow-band applications, where
the filters can be used conveniently to improve SNR and knock-off harmonics, while at the same time
reducing the output data rate. The device includes an averaging mode where two channels (or even
four channels) can be averaged to improve SNR.
Serial LVDS outputs reduce the number of interface lines and enable the highest system
integration. The digital data from each channel ADC can be output over one or two wires of LVDS
output lines depending on the ADC sampling rate. This 2-wire interface helps keep the serial data
rate low, allowing low cost FPGA based receivers to be used even at high sample rate. A unique
feature is the programmable mapping module that allows flexible mapping between the input channels
and the LVDS output pins. This helps greatly reduce the complexity of LVDS output routing and can
potentially result in cheaper system boards by reducing the number of PCB layers.
The device integrates an internal reference trimmed to accurately match across devices.
Best performance is expected to be achieved through the internal reference mode. The device can be
driven with external references as well.
The device is available in a 12 mm × 12 mm 80-pin QFP. It is specified over a –40°C to 85°C operating temperature range. ADS5292 is completely pin-to-pin and register compatible to ADS5294.
