ATSAM4LS4BA-AU

Microcontroller Features

Core

• ARM Cortex-M4 running at up to 48 MHz

• Memory Protection Unit (MPU)

• DSP Instructions, Thumb®-2 instruction set

• 512 Kbytes embedded Flash, 0 wait-state capability up to 24MHz

• 64 Kbytes embedded SRAM

• Embedded voltage regulator for single-supply operation

• Two Power-on-Reset and Two Brown-out Detectors (BOD)

• Quartz or ceramic resonator oscillators: 0.6 to 30MHz main power with Failure Detection and low power 32.768 kHz for RTC or device clock

  • High-precision 8/12 MHz factory-trimmed internal RC oscillator

  • Slow clock internal RC oscillator as permanent low-power mode device clock

  • High speed 80MHz internal RC oscillator

  • Low power 32kHz internal RC oscillator

  • PLL up to 240MHz for device clock and for USB

  • Digital Frequency Locked Loop (DFLL) with wide input range

  • Up to 16 peripheral DMA (PDCA) channels

• Active mode down to 90μA/MHz with configurable voltage scaling

• High performance and efficiency: 28 coremark/mA

• Wait mode down to 3μA with fast wake-up time (<1.5μs) supporting SleepWalking

• Full RAM and Logic Retention mode down to 1.5μA with fast wake-up time (<1.5μs)

• Ultra low power Backup mode with/without RTC down to 1.5/0.9μA

• 64-lead LQFP, 10x10 mm, pitch 0.5 mm

• 64-pad QFN, 9x9 mm, pitch 0.5 mm

• 64-ball WLCSP, 5,270x5,194 mm, pitch 0.5 mm

• Industrial (-40° C to +85° C)

• USB 2.0 Device: 12 Mbps, up to 8 bidirectional Endpoints and Multi-packet Ping-pong Mode. On-Chip Transceiver

• One USART with ISO7816, IrDA®, RS-485, SPI, Manchester and LIN Mode

• Three USART with SPI Mode

• One PicoUART for extended UART wake-up capabilities in all sleep modes

• Windowed Watchdog Timer (WDT)

• Asynchronous Timer (AST) with Real-time Clock Capability, Counter or Calendar Mode Supported

• Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency

• Three 16-bit Timer/Counter (TC) Channels with capture, waveform, compare and PWM mode

• One Master/Slave Serial Peripheral Interface (SPI) with Chip Select Signals

• Four Master and Two Slave Two-wire Interfaces (TWI), up to 3.4Mbit/s I2C-compatible

• Capacitive Touch Module (CATB) supporting up to 32 buttons

• Inter-IC Sound (IISC) Controller, Compliant with Inter-IC Sound (I2S) Specification

• Peripheral Event System for Direct Peripheral to Peripheral Communication

• Parallel Capture Module (PARC)

• Glue Logic Controller (GLOC)

• 43 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and slew-rate control

• Three High-drive I/O Pins

• One 8-channel ADC 300Ksps (ADC) with up to 12 Bits Resolution

• One DAC 500Ksps (DACC) with up to 10 Bits Resolution

• Two Analog Comparators (ACIFC) with Optional Window Detection

• Audio Bitstream DAC (ABDACB) Suitable for Stereo Audio

• Serial Wire/JTAG Debug Port(SWJ-DP)

• Debug access to all memories and registers in the system, including Cortex-M4 register bank when the core is running, halted, or held in reset.

• Serial Wire Debug Port (SW-DP) and Serial Wire JTAG Debug Port (SWJ-DP) debug access.

• Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches.

• Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system profiling.

• Instrumentation Trace Macrocell (ITM) for support of printf style debugging.

• IEEE1149.1 JTAG Boundary-scan on all digital pins.

• ASF-Atmel software Framework – SAM software development framework

• Integrated in the Atmel Studio IDE with a graphical user interface or available as standalone for GCC, IAR compilers.

• DMA support, Interrupt handlers Driver support

• USB, TCP/IP, Wi-Fi and Bluetooth, Numerous USB classes, DHCP and Wi-Fi encryption Stacks

• RTOS integration, FreeRTOS is a core component